Run-time parallelization of loops in computer programs with static irregular memory access patterns
US7076777B2 · kind B2 · utility
11Cited by
2References
7Claims
0Family size
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Key dates
| Filing date | Aug 7, 2002 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Mar 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Run-time parallelization of loops with static irregular read-write memory access patterns is performed across multiple arrays. More than one element from each array can be read or written during each iteration of the loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.