Semiconductor package
US7078800B2 · kind B2 · utility
11Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2004 |
| Grant date | Jul 18, 2006 |
| Priority date | — |
| Expiry date | Sep 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16251
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor packages are provided to prevent a chip, such as a central processing unit (CPU) chip, from being degraded due to hot spot heat generated during the operation of the chip and absorbs thermomechanical stresses in interfaces between the chip, a thermal interface material (TIM) and a lid. The chip is electrically connected, e.g., flip-chip bonded, to a package substrate. The lid is thermally connected to and disposed over a back surface of the chip with the TIM interposed therebetween. A heat dissipation means adjacent the TIM is also located between the lid and the chip to prevent the hot spot effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.