Interrupt pre-emption and ordering within a data processing system
US7080178B2 · kind B2 · utility
2Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2004 |
| Grant date | Jul 18, 2006 |
| Priority date | — |
| Expiry date | May 22, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system nested interrupt controller 24 responsive to priority level values 28, 30 associated with respective interrupt handling programs to control the execution of those interrupt handling programs. The priority level values have a first portion 28 which controls whether or not a pending interrupt handling program will pre-empt an already active interrupt handling program and a second portion 30 which controls which of a plurality of pending interrupt handling programs will be executed next when they share the same value for the first portion of their priority level value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.