Patent · US Expired

Multi-level interrupts

US7080179B1 · kind B1 · utility

6Cited by

6References

34Claims

0Family size

Assignee

FOUNDRY NETWORKS, LLC · US

Inventors

Changbai He · San Jose, US
Ron Talmor · Sunnyvale, US

Key dates

Filing date	Mar 26, 2004
Grant date	Jul 18, 2006
Priority date	—
Expiry date	Nov 14, 2024

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/24
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Multiple levels of interrupts to be utilized in a computer system, which allows, for example, an interrupt with an interrupt level associated with an application to be distinct from an interrupt with an interrupt level associated with a kernel. The kernel level interrupt may be handled quickly via its own handler, while the application level interrupt may be handled more slowly. This may be accomplished by first determining if a first-level handler is installed for the interrupt source. If so, then it may be called. Otherwise, the interrupt source may be masked and a second-level handler may be called. Once this second-level handler has completed its tasks, the interrupt source may then be unmasked. Implementations with three or more levels of interrupt are also possible.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.