Register window flattening logic for dependency checking among instructions
US7080237B2 · kind B2 · utility
1Cited by
3References
5Claims
0Family size
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Key dates
| Filing date | May 24, 2002 |
| Grant date | Jul 18, 2006 |
| Priority date | — |
| Expiry date | Jun 17, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for flattening architectural register windows into flattened space depending on a current window pointer to a register window is provided. The technique involves converting an n-bit value of a particular register in a register window to an x-bit value dependent on the current window pointer, where x is greater than n, and where the x-bit value is used for register dependency checking among a plurality of instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.