Reset circuitry for an integrated circuit
US7081780B2 · kind B2 · utility
7Cited by
11References
17Claims
0Family size
Inventors
Key dates
| Filing date | Jun 1, 2004 |
| Grant date | Jul 25, 2006 |
| Priority date | — |
| Expiry date | Aug 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/22
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Reset circuitry for an integrated circuit is presented. An internal oscillator produces an oscillating signal upon power-up of the integrated circuit. The internal oscillator is not dependent on signals generated outside the integrated circuit. An electro-static discharge blocker circuit receives an external reset signal generated outside the integrated circuit. The electrostatic discharge blocker circuit utilizes the oscillating signal to perform electro-static discharge blocking for the external reset signal to produce an internal reset signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.