Paralleling digital-input amplifiers
US7081794B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2004 |
| Grant date | Jul 25, 2006 |
| Priority date | — |
| Expiry date | Sep 16, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/602
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Two or more digital-input RF amplifiers are configured in parallel such that a combiner combines their respective outputs to generate a relatively large composite RF output signal. A feedback control architecture minimizes the phase differences between the various amplifier outputs so that the outputs can be efficiently combined. The feedback control can measure the return loss for each amplifier to determine how to adjust each amplifier's phase. In some embodiments, the feedback control can also measure the composite RF output signal for use in phase adjustment. In certain implementations, phase adjustment is implemented by an iterative coarse phase-adjustment mode (e.g., based on either the return loss or the composite output signal) followed by an iterative fine phase-adjustment mode (e.g., based on the return loss).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.