Interruptible digital signal processor having two instruction sets
US7082518B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2001 |
| Grant date | Jul 25, 2006 |
| Priority date | — |
| Expiry date | Apr 8, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a digital signal processing apparatus comprising a plurality of available hardware resource means and a first instruction set means having access to said available hardware resource means, so that at least a part of said hardware resource means execute operations under control of said first instruction set means, and further comprising a second instruction set means having access to only a predetermined limited subset of said plurality of available hardware resource means, so that at least a part of said predetermined limited subset of said hardware resource means execute operations under control of said second instruction set means. Further, the present invention relates to a method for processing digital signals in a digital signal processing apparatus comprising a plurality of available hardware resource means, wherein at least a part of said hardware resource means execute operations under control of a first instruction set, and wherein at least a part of a predetermined limited subset of said plurality of available hardware resource means execute operations under control of a second instruction set having access to only said predetermined limit…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.