Fabrication method of semiconductor integrated circuit device
US7084063B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2003 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Mar 1, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, a deoxidizing process due to hydrogen annealing or the like, and acid cleaning are carried out in this order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this way, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.