Sub-harmonic mixer
US7084693B2 · kind B2 · utility
3Cited by
4References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 25, 2003 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Feb 14, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/28
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A sub-harmonic mixer comprises two field effect transistors (FETs) in which the drains are coupled together. The mixer includes a signal generator for generating two local oscillator signals in antiphase with each other and which is arranged to feed one local oscillator signal to the source of one of the FETs and the other local oscillator signal to the source of the other FET. An input and output port is coupled to the drains for receiving input signals for the mixer and outputting output signals from the mixer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.