Pre-drive circuit, capacitive load drive circuit and plasma display apparatus
US7084839B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2004 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Mar 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pre-drive circuit having low deviation of timing of a high level and a low level output voltages is disclosed. A plurality of drive systems are comprised, each having an input amplifier circuits for amplifying input voltages input to input voltage terminals, high level shift circuits for shifting signal levels output from the input amplifier circuits, and output amplifier circuits for amplifying shift signals output from the high level shift circuits, and each drive system has the same constitution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.