Systems and methods for preventing malfunction of content addressable memory resulting from concurrent write and lookup operations
US7085147B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 3, 2004 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Jan 14, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for preventing the corruption of a CAM lookup result when a lookup in the CAM and a write to the CAM are concurrently executed. In one embodiment, a tag value is clocked into a tag latch simultaneously with a data value being clocked into a data latch. The tag value and initial CAM element values begin propagating through comparison logic. After a delay, the data value is written from the data latch to a CAM element. After the tag value and initial CAM values propagate through the comparison logic to produce comparison outputs, but before the newly written data value propagates through the comparison logic and changes the comparison outputs, the comparison outputs are latched. The comparison outputs can then be processed as if the data values in the CAM elements had not been changed by the write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.