Fast detection of incorrect sampling in an oversampling clock and data recovery system
US7085970B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2002 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Sep 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/14
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method, in an oversampling clock and data recovery system, for detecting that sampling is stuck taking place at a data edge, by detecting a data edge in an early or a late region relative to a good region and incrementing a stuck early or stuck late counter; and if one counter reaching a maximum, setting a condition indicating that sampling is stuck taking place at a data edge. If a data edge is detected in the good region, or in each of an early and a late region in a single data period, the stuck counters are reset to zero. The detection of which stuck counter has reached a maximum can cause the moving of a sampling clock forward or backward, ending when a data edge occurs in a good region, or in each of an early region and a late region in a single data period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.