CMOS image sensor using shared transistors between pixels with dual pinned photodiode
US7087883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2004 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Sep 16, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/778
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A CMOS image sensor that has reduced transistor count is disclosed. The individual pixels are formed by a pinned photodiode and a transfer transistor. An output node receives the signal from the photodiode via the transfer transistor. The output node is shared between multiple pixels. Further, a reset transistor is coupled between a selectable low voltage rail Vss or a high voltage reference Vref and the output node. The gate of an output transistor is then coupled to the output node. Both the reset transistor and output transistors are shared between multiple pixels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.