Dynamic circuits having improved noise tolerance and method for designing same
US7088143B2 · kind B2 · utility
66Cited by
21References
21Claims
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Key dates
| Filing date | May 17, 2004 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Jul 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A number of different dynamic circuits having improved noise tolerance and a method for designing same are provided. The circuits include a power supply node and a precharge node. Keeper circuitry is connected to the nodes and has a current-voltage characteristic that exhibits a negative differential resistance property to improve noise tolerance of the circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.