Communication apparatus
US7088696B1 · kind B1 · utility
3Cited by
14References
7Claims
0Family size
Inventors
Key dates
| Filing date | Oct 27, 1999 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Oct 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/70707
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The hardware configuration of a baseband block in a radio communication system is reduced in gate size. Modulation/demodulation processing in a baseband block is divided into a plurality of processing units, which are connected to one another by buffer memories. The hardware gate sizes are reduced by performing processing on a plurality of channels by time division multiplexing at a speed higher than the speed at which received signals are written into the buffer memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.