Error correction of data across an isolation barrier
US7089475B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2003 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Jun 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0298
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A communication isolation system is provided that may employ error correction techniques for the data communicated across an isolation barrier used for connecting electronic circuitry to a communication line. In one embodiment, each data bit to be transmitted to or from the phone line may be transmitted three times across an isolation barrier so that it is possible to withstand a single electronic fast transient event. In another embodiment, the isolation barrier may be a capacitive isolation barrier. In another embodiment, the three transmissions of the data bit may be received across the isolation barrier and delay elements utilized to provide the data bits to a logic circuit in a synchronized fashion so that the three data bits may be compared to determine the error corrected data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.