Power-on reset circuit, semiconductor integrated circuit device including the same and method for generating a power-on reset signal
US7091758B2 · kind B2 · utility
11Cited by
11References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2004 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Aug 4, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit may include an internal circuit, and a power-on reset circuit for generating a power-on reset signal to initialize the internal circuit at a power-on. At the power-on, the power-on reset circuit delays a transition of the power-on reset signal from a first level to a second level until a given time duration after the power supply voltage reaches a detection voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.