Direct synthesis clock generation circuits and methods
US7092476B1 · kind B1 · utility
10Cited by
7References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 6, 2001 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Jan 5, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock generator includes input circuitry for receiving an input signal and generating a memory address therefrom. A memory stores digital data indexed by the memory address which represents at least a portion of an analog clock. A digital to analog converter converts data retrieved from the memory to generate the analog clock which is then filtered by a filter and then converted into digital output clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.