Data array having redundancy messaging between array controllers over the host bus
US7093043B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2001 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Feb 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data array system, and inter-controller-link messaging method, for controlling redundant access to a storage device and providing inter-controller communication without a dedicated controller link. The host has a host bus, such as a PCI bus, and the system includes an active and a standby controller that are linked to the host bus and use the host bus for an inter-controller-link. A messaging mechanism transmits messages and data over the host bus from the active to the standby controller. The standby controller includes message and data buffers for storing the messages and data written and a message queue in which the active controller writes a signal identifier indicating that a new message has been written and defining the message for processing by the standby controller (such as a message-only transfer, a partial or all data transfer, or as a data-only transfer).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.