Dynamic input/output: configurable data bus for optimizing data throughput
US7093051B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 17, 2002 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Apr 25, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic I/O configuration and protocol includes a configurable data bus for optimizing data throughput. The configurable data bus includes multiple bi-directional data buses between a memory device and a controller to maximize the data transfer efficiency of operation sequences and thereby optimize data throughput to and from the memory device. Each of the bi-directional data buses are configured for utilization in both read operations from and write operations to the memory device. Using control input signal lines, the controller specifies a current operation to be performed and the data bus to be used to perform the current operation. The specific instructions that are provided from the controller to the memory device depend on the particular operation sequence being performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.