Access method and architecture of non-volatile random access memory
US7093060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2003 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Dec 24, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method as well as an architecture for a host equipped with a CPU-level processing capability to access a Non-Volatile Random Access Memory (NVRAM) and at least a controller via a simple 3-wire/4-wire mechanism. The data stored in the NVRAM are shared with the controller and the host. More importantly, a multi-access mechanism further having a pragmatic bit determines the pragmatic bit for either the controller or the NVRAM. With the method of the present invention, computer system resources can be fully utilized, and thereby, peripheral devices can be easily added to the system in an inexpensive and highly efficient way.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.