Method of controlling probe tip sanding in semiconductor device testing equipment
US7094615B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2003 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Dec 6, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R35/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In a method of and apparatus for controlling probe tip sanding in semiconductor device testing equipment, resistance values of pads of a probed chip are measured and stored. If a maximum resistance value among the stored resistance values is greater than a contact resistance reference value, a consecutive fail counting value and an accumulated fail counting value are increased. An automatic sanding command is generated to activate automatic sanding of a probe tip, when at least one of the consecutive fail counting value and the accumulated fail counting value is greater than a respective counting reference value. In this manner, false negative readings in the testing of semiconductor devices as the result of increased contact resistance between a probe tip and a pad in an EDS test are reduced and therefore device yield is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.