Providing reference voltage with desired accuracy in a short duration to a dynamically varying load
US7095356B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2005 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Sep 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/167
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Simplifying the design of buffer amplifier circuits to provide reference voltages of desired characteristics on a path. Two separate circuits may be used to provide the necessary charging (of a load connected to the path) in non-overlapping time durations. In an embodiment in which the load comprises sampling capacitors of a stage of an analog to digital converter (ADC), each of the two circuits contains a corresponding charging capacitor, with the charging capacitors charging the load in non-overlapping time durations of a hold phase. The first charging capacitor may be charged using a coarse buffer with a high drive strength and the second charging capacitor may be charged using a fine buffer with high accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.