Computer performance improvement by adjusting a time used for preemptive eviction of cache entries
US7096320B2 · kind B2 · utility
7Cited by
10References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2001 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Jul 21, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/122
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache memory system can determine that an entry is stale if the entry has not been accessed or modified for a predetermined time. If an entry is stale, the entry may be preemptively evicted. The predetermined time is made dynamically variable. A computer system can adjust the time to optimize a measure of performance. In a specific example, evicted lines are temporarily stored in an eviction queue. The time is adjusted to be as short as possible without substantially increasing the number of lines that must be recalled from the eviction queue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.