Instruction processor write buffer emulation using embedded emulation control instructions
US7096322B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2003 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Mar 23, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are described for accurately and efficiently emulating an instruction processor having a write buffer. The described techniques may be utilized to quickly develop an emulated instruction processor that provides a fully-functional write buffer interface in an efficient and elegant manner. For example, a system is described that includes a computing system that provides an emulation environment, and software executing within the emulation environment that emulates an instruction processor having a write buffer interface and a memory interface. The software emulates the instruction processor by selectively outputting a write request on the write buffer interface or the memory interface in response to an emulation control instruction embedded within an instruction stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.