Method and apparatus for a chaotic computing module using threshold reference signal implementation
US7096437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2003 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Jul 20, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N7/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamically configurable logic gate can include a controller configured to provide a first threshold reference signal; an adder configured to sum the first threshold reference signal and at least one input signal to generate a summed signal; a chaotic updater configured to apply a nonlinear function to the summed signal; and a subtractor configured to determine an output signal by taking a difference between a second threshold reference signal and the processed summed signal from the chaotic updater. The logic gate can operate as one of a plurality of different logic gates responsive to adjusting at least one of the threshold reference signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.