Patent · US Expired

Techniques for mounting an area array package to a circuit board using an improved pad layout

US7098408B1 · kind B1 · utility

5Cited by
14References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 14, 2003
Grant dateAug 29, 2006
Priority date
Expiry dateFeb 9, 2024

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02P70/50
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A circuit board assembly includes a printed circuit board (PCB). The PCB has a pad layout which includes a set of pads arranged in a two-dimensional array having at least two pads in a first direction and at least two pads in a second direction that is substantially perpendicular to the first direction. Each pad has (i) a central portion and (ii) multiple lobe portions integrated with the central portion and extending from the central portion of that pad. The circuit board assembly further includes a circuit board component mounted to the pad layout via a set of solder joints. The above-described pad layout (or land pattern) is well-suited for soldering to a variety of AAP devices (e.g., either a CCGA device or a BGA device).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.