Reduced turn-on current content addressable memory (CAM) device and method
US7099170B1 · kind B1 · utility
4Cited by
11References
20Claims
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Key dates
| Filing date | Sep 14, 2004 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Jan 18, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content addressable memory (CAM) device (400) can sequentially apply command and key data to different sections (404-1 to 404-4). Within each section, CAM cores (402-11 to 402-44) can be sequentially activated. Current surges when transitioning from an idle state to an active state, or vice versa, can be significantly reduced with additional latency but no loss in throughput.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.