Phase change memory bits reset through a series of pulses of increasing amplitude
US7099180B1 · kind B1 · utility
102Cited by
7References
6Claims
0Family size
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Key dates
| Filing date | Feb 15, 2005 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Feb 15, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A set bit in a phase change memory may be programmed to a reset bit using a series of pulses of increasing amplitude. An initial start pulse is applied. After the start pulse is applied, a check determines whether the bit has been reset. If not, a higher amplitude pulse is applied. Each time the pulse amplitude is to be incremented, a check determines whether a maximum safe pulse amplitude has been exceeded. The pulse amplitude is continually incremented until either the maximum is reached or all the bits to be programmed have been programmed into the correct reset state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.