Processor interrupt filtering
US7099977B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2004 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Jan 14, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for processing an interrupt message in a system having a plurality of processors arranged into at least two partitions. The interrupt message is decoded to identify an interrupt source. If the interrupt source is not in an interrupt set, the interrupt is dropped. If the interrupt source is in a local partition, the interrupt is delivered. If the interrupt source is in the interrupt set and not in the local partition, the interrupt is processed in accordance with at least one of a target enable register and a vector enable register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.