Method and apparatus for addressing a vector of elements in a partitioned memory using stride, skip and span values
US7100019B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2003 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Aug 21, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8061
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for calculating memory addresses in a partitioned memory in a processing system having a processing unit, input and output units, a program sequencer and an external interface. An address calculator includes a set of storage elements, such as registers, and an arithmetic unit for calculating a memory address of a vector element dependent upon values stored in the storage elements and the address of a previous vector element. The storage elements hold STRIDE, SKIP and SPAN values and optionally a TYPE value, relating to the spacing between elements in the same partition, the spacing between elements in the consecutive partitions, the number of elements in a partition and the size of a vector element, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.