Special encoding of known bad data
US7100096B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Oct 8, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0724
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-processor system in which each processor receives a message from another processor in the system. The message may contain corrupted data that was corrupted during transmission from the preceding processor. Upon receiving the message, the processor detects that a portion of the message contains corrupted data. The processor then replaces the corrupted portion with a predetermined bit pattern known or otherwise programmed into all other processors in the system. The predetermined bit pattern indicates that the associated portion of data was corrupted. The processor that detects the error in the message preferably alerts the system that an error has been detected. The message now containing the predetermined bit pattern in place of the corrupted data is retransmitted to another processor. The predetermined bit pattern will indicate that an error in the message was detected by the previous processor. In response, the processor detecting the predetermined bit pattern preferably will not alert the system of the existence of an error. The same message with the predetermined bit pattern can be retransmitted to other processors which also will detect the presence of the predetermine…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.