Method and platform for integrated physical verifications and manufacturing enhancements
US7100134B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2003 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Jan 24, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An automated design for manufacturability platform which provides integrated physical verification and manufacturing enhancement operations. The platform uses an efficient data structure capable of handling and manipulating both layout circuit and geometry characteristics, which permits a wide range of operations such as timing analysis, design-rule checking and optical proximity corrections on a single platform. This feature eliminates the need to translate layout representations between various tools without the requirement of using a common database. Moreover, the platform's common user interface enables encapsulated information exchange between the design and the manufacturing teams, permiting early consideration of manufacturing distortion or enhancement impact on circuit performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.