Patent · US Expired

Method for programming/parallel programming of onboard flash memory by multiple access bus

US7102383B2 · kind B2 · utility

6Cited by

6References

20Claims

0Family size

Assignee

STMicroelectronics SA

Inventors

Andre Roger · Munich, DE
Charles Aubenas · Grenoble, FR
Julien Fabregues · Beverly Hills, US

Key dates

Filing date	Jun 12, 2002
Grant date	Sep 5, 2006
Priority date	—
Expiry date	Apr 15, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/102
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A process of programming or reprogramming a reprogrammable onboard memory (5) comprises programming or reprogramming the onboard memory of several modules (M0, M1) in parallel through a multiple access bus (6) to which the modules are connected. In the case of blank flash memories, a process downloads code through the multiple access bus (6) and executes the code, eliminating all external constraints (such as frequency, binary throughput). The process is more particularly intended to apply to onboard flash type memories.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.