Clock-generator architecture for a programmable-logic-based system on a chip
US7102391B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2004 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Oct 6, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45166
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.