RF amplifier with enhanced efficiency
US7102429B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2002 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Apr 5, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/504
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high efficiency amplifier arrangement consistent with certain embodiments of the invention has an amplifier (104) that receives an input signal and amplifies the input signal to produce an output signal that drives a load (108). A variable impedance transformer (300) is disposed between the amplifier (104) and the load (108) to presents a varying load impedance to the output of the amplifier (104). A control mechanism, such as a programmed processor (604, 504), controls the variable impedance transformer (300) with a control signal so that the load impedance seen by the amplifier (104) varies in accordance with an envelope of the input signal. The control signal varies the load impedance in a manner that keeps the output of the amplifier (104) near a peak value. The arrangement may further include a circuit for controlling a DC input bias (420) of the amplifier (104) to keep the amplifier (104) operating within a predetermined class of operation throughout a range of input signals. The control signal may be calculated, looked up in a lookup table (610) or derived from an envelope detector (404).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.