Boosting circuit
US7102433B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2004 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Feb 5, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/10009
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A boosting circuit is disclosed. The boosting circuit includes an input circuit part for outputting a differential current proportional to input voltages; a bias circuit part for mirroring the differential current, and producing an inverted differential current that the differential current is inverted; and an output circuit part for adjusting magnitudes of the differential current and the inverted differential current based on a predetermined ratio of MOS transistors, respectively, adding the adjusted differential current and inverted differential current, and producing an output current in a push-pull form. Accordingly, the boosting circuit has a broad maximum differentiable frequency bandwidth, and facilitates the adjustments of differentiation characteristics of an output current. Further, an amount of output current of differentiation form is not affected by external factors such as voltages, processes, temperatures, and so on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.