Five-level feed-back digital-to-analog converter for a switched capacitor sigma-delta analog-to-digital converter
US7102558B2 · kind B2 · utility
23Cited by
8References
17Claims
0Family size
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Key dates
| Filing date | Aug 2, 2005 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Aug 2, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/456
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A five-level feed-back digital-to-analog converter (DAC) in a switched capacitor sigma-delta analog-to-digital converter has an improved switching sequence that boosts from two to five the number of quantization levels of the feed-back DAC. Switching sequences are used to obtain five equally distributed charge levels C*VREF, C*VREF/2, 0, −C*VREF/2 and −C*VREF. When summed with an input voltage, VIN, the five-level feed-back DAC produces five equally distributed output voltages of A*VIN+VREF, A*VIN+VREF/2, A*VIN+0, A*VIN−VREF/2 and A*VIN−VREF, where A is gain, VIN is the input voltage, and VREF is the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.