Chip card loadable with compressed data
US7103780B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 4, 1999 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Nov 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q20/35765
- WIPO fieldIT methods for management
- WIPO sectorElectrical engineering
Abstract
The invention concerns a chip card receiving fields of compressed data encapsulated in frames including an indication of the expected length of decompressed data and a length of compressed data. The frames are received in a storage unit and the processor of the card decompresses each data field according to a decompression algorithm over a length based on the indication of the expected length and writes the decompressed data in another buffer storage unit. Several algorithms and optionally several decompression models are installed in the card storage unit, and a couple thereof is selected by the number read in the heading of each frame received.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.