Method and apparatus for synchronizing a multiple-stage multiplexer
US7106227B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Sep 12, 2006 |
| Priority date | — |
| Expiry date | Jul 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/047
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for synchronizing multiple-stage multiplexers are disclosed. According to exemplary embodiments of the present invention, multiplexer circuits in the multiple-stage multiplexer are synchronized based upon a frequency response of the output of the multiplexer. The power level of the output of the multiple-stage multiplexer is measured at a frequency corresponding to the input data rate of the multiple-stage multiplexer, during the time a test pattern is sent through the multiple-stage multiplexer. In an exemplary embodiment of the invention, the multiple-stage multiplexer is placed in substantially random states until the measured power level reaches the predetermined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.