Method and apparatus for high speed packet switching using train packet queuing and providing high scalability
US7106738B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2001 |
| Grant date | Sep 12, 2006 |
| Priority date | — |
| Expiry date | Jun 14, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5679
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a system architecture capable of processing fixed length and/or variable length data packets. Under the method of the invention, incoming data packets are queued together according to their corresponding switch processing parameters (SPPs), and then the commonly-queued data packets are processed through a switch fabric as a single unit. In one aspect of the invention, the commonly-queued data packets are processed by the switch fabric as a single train packet. In another aspect of the invention, the commonly-queued data packets are sliced into a set of subtrain packets. A switch fabric then processes the set of subtrain packets in parallel using a plurality of switch planes. Both aspects of the invention can be implemented with a plurality of packet formatters and deformatters linked to a switch fabric in various configurations, including multi-path and hierarchical switching systems. a multichannel switching system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.