Data access in a processor
US7107429B2 · kind B2 · utility
1Cited by
11References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2006 |
| Grant date | Sep 12, 2006 |
| Priority date | — |
| Expiry date | Mar 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8053
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor comprising: a register memory comprising an array of memory cells, each cell being addressable by means of an instruction specifying a pair of coordinates that identify the cell in the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.