Concatenated turbo product codes for high performance satellite and terrestrial communications
US7107505B2 · kind B2 · utility
12Cited by
8References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 27, 2002 |
| Grant date | Sep 12, 2006 |
| Priority date | — |
| Expiry date | Jul 13, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/618
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Architecture for enhancing the encoding/decoding of information of a channel. A stream of incoming information bits are arranged into a first array of information bits. The first array of information bits are processed into a first code of bits, which bits form a plurality of first code words having a minimum distance to neighboring error events. Selected bits of the first code are rearranged into a second array of bits by intermittent successive rotations of the selected bits of the first code. A second code is then generated from the second array of bits to increase the minimum distance to the neighboring error events.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.