Manufacturing test for a fault tolerant magnetoresistive solid-state storage device
US7107508B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2002 |
| Grant date | Sep 12, 2006 |
| Priority date | — |
| Expiry date | Oct 24, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/44
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fault-tolerant magnetoresistive solid-state storage device (MRAM) in use performs error correction coding and decoding of stored information, to tolerate physical failures. At manufacture, the device is tested to confirm that each set of storage cells is suitable for storing ECC encoded data. The test comprises identifying failed cells where the failures will be visible in use for the generation of erasure information used in ECC decoding, by comparing parametric values obtained from the cells against one or more failure ranges, and includes performing a write-read-compare operation with test data to identify failed cells which will be hidden for the generation of erasure information in use. A failure count is formed based on both the visible failures and the hidden failures, to determine that the set of cells is suitable for storing ECC encoded data. The failure count is weighted, with hidden failures having a greater weighting than visible failures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.