Thermally enhanced component substrate
US7109573B2 · kind B2 · utility
7Cited by
8References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 10, 2003 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Jun 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An IC package dissipates thermal energy using thermally and electrically conductive projections. The IC package includes a substrate material with a die pad area, which is suitable to support an integrated circuit. A plurality of solder ball pads is disposed on a first surface of the substrate material and a plurality of conductive projections radiate outwardly from the die pad area and extend to cover a corresponding selected solder ball pad to facilitate the dissemination of thermal energy from the die pad area to the substrate and/or printed wiring board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.