Fast-disabled voltage regulator circuit with low-noise feedback loop and operating method thereof
US7109690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2004 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Nov 11, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A low-noise voltage regulator circuit with quick disablement is disclosed. The voltage regulator circuit includes an amplifier for outputting a driving voltage according to a reference voltage, a feedback voltage on a feedback node, and an enable signal; an output transistor coupled among the amplifier, an output node, and a first voltage source for outputting an output voltage at the output node; a first discharge transistor coupled among the enable signal, the output node, and the feedback node; and a second discharge transistor coupled among the enable signal, the feedback node, and a second voltage source; wherein when the enable signal disables the amplifier, the enable signal turns on the first discharge transistor and the second discharge transistor such that the output voltage is quickly pulled down to close a level provided by the second voltage source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.