Temperature-independent amplifier offset trim circuit
US7109697B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2005 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Jun 29, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S323/907
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An operational amplifier having temperature-compensated offset correction. The amplifier includes an operational amplifier circuit, that has a first input field effect transistor (FET) having a gate connected to receive a first input signal, and a second input FET having a gate connected to receive a second input signal, the first and the second input FETs being connected together to receive a first bias current, and also being connected to respective sides of a first current mirror. A correction amplifier circuit is also provided, that has a first correction FET having a gate, and a second correction FET having a gate, the first and the second correction FETs being connected together to receive a second bias current, and also being connected to respective sides of a second current mirror. A resistor is arranged to have a fixed voltage provided across it, one terminal of the resistor being connected to the gate of the first correction FET and the other terminal of the resistor being connected to the gate of the second correction FET. A first bias FET is connected to conduct an “extra” current from the second correction FET that is blocked by the current mirror action from flowing t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.