Differential gain stage for low voltage supply
US7109794B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2004 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Nov 4, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A new method and a circuit to improve the low voltage performance of a differential gain stage is achieved. The method comprises a monitoring stage and a differential stage. The monitoring stage comprises a differential transistor pair having first and second differential inputs, an upper current input, and a lower current output. In addition, a current source is connected to the upper current input, and a current load is connected to the lower current output. The differential stage comprises a differential transistor pair having first and second differential inputs, an upper current input, and first and second lower current outputs. In addition, a current source is connected to the upper current input, and first and second current loads are connected to the first and second lower current inputs. A current is forced through the monitoring stage current source. The current through the monitoring stage current source is mirrored in the differential stage current source. Current through the monitoring stage current load is mirrored through the differential transistor stage first and second current loads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.