Separated power ESD protection circuit and integrated circuit thereof
US7110228B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 24, 2004 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Sep 24, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/921
Abstract
A separated power ESD protection circuit is disclosed. The separated power ESD protection circuit is coupled between a first and a second power lines. The separated power ESD protection circuit has a first diode, a second diode and a MOS transistor. The first diode has an anode and a cathode, wherein the anode is coupled to the first power line. The source of the MOS transistor is coupled to the second power line. The anode of the second diode is coupled to the second power line and cathode is coupled to the first power line. The first diode and the MOS transistor form a parasitic silicon-controlled rectifier (SCR) so as to provide a discharge route for ESD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.